1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Description of the Related Art
Dynamic random access memories (DRAMs) are widely used as typical semiconductor memory devices. DRAMs are divided into two kinds of DRAMs by the difference in signal detecting method of bit lines, that is, open-bit-line DRAMs and folded-bit-line DRAMs (for example, see Patent Document 1).
In the folded-bit-line DRAM, memory cells are provided in half of all intersections of word lines and bit lines, and thus the area per memory cell is greater than or equal to 8F2 (F is a feature size). In contrast, in the open-bit-line DRAM, ideally, a contact can be shared, and thus the area per memory cell can be reduced to 6F2.
In addition, as a formation method of a capacitor in a DRAM, two kinds of formation methods, that is, a trench capacitor method in which a deep hole is formed in a silicon substrate, and a stacked capacitor method in which an electrode is stacked above a transistor are used. The stacked capacitor method has an advantage over the trench capacitor method when the feature size is small.